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<li class="breadcrumb-item active">Arm MPS2 and MPS3 boards (<code class="docutils literal notranslate"><span class="pre">mps2-an385</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an386</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an500</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an505</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an511</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an521</span></code>, <code class="docutils literal notranslate"><span class="pre">mps3-an524</span></code>, <code class="docutils literal notranslate"><span class="pre">mps3-an547</span></code>)</li>
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<section id="arm-mps2-and-mps3-boards-mps2-an385-mps2-an386-mps2-an500-mps2-an505-mps2-an511-mps2-an521-mps3-an524-mps3-an547">
<h1>Arm MPS2 and MPS3 boards (<code class="docutils literal notranslate"><span class="pre">mps2-an385</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an386</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an500</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an505</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an511</span></code>, <code class="docutils literal notranslate"><span class="pre">mps2-an521</span></code>, <code class="docutils literal notranslate"><span class="pre">mps3-an524</span></code>, <code class="docutils literal notranslate"><span class="pre">mps3-an547</span></code>)<a class="headerlink" href="#arm-mps2-and-mps3-boards-mps2-an385-mps2-an386-mps2-an500-mps2-an505-mps2-an511-mps2-an521-mps3-an524-mps3-an547" title="Link to this heading"></a></h1>
<p>These board models all use Arm M-profile CPUs.</p>
<p>The Arm MPS2, MPS2+ and MPS3 dev boards are FPGA based (the 2+ has a
bigger FPGA but is otherwise the same as the 2; the 3 has a bigger
FPGA again, can handle 4GB of RAM and has a USB controller and QSPI flash).</p>
<p>Since the CPU itself and most of the devices are in the FPGA, the
details of the board as seen by the guest depend significantly on the
FPGA image.</p>
<p>QEMU models the following FPGA images:</p>
<dl class="simple">
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an385</span></code></dt><dd><p>Cortex-M3 as documented in Arm Application Note AN385</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an386</span></code></dt><dd><p>Cortex-M4 as documented in Arm Application Note AN386</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an500</span></code></dt><dd><p>Cortex-M7 as documented in Arm Application Note AN500</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an505</span></code></dt><dd><p>Cortex-M33 as documented in Arm Application Note AN505</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an511</span></code></dt><dd><p>Cortex-M3 DesignStart as documented in Arm Application Note AN511</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps2-an521</span></code></dt><dd><p>Dual Cortex-M33 as documented in Arm Application Note AN521</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps3-an524</span></code></dt><dd><p>Dual Cortex-M33 on an MPS3, as documented in Arm Application Note AN524</p>
</dd>
<dt><code class="docutils literal notranslate"><span class="pre">mps3-an547</span></code></dt><dd><p>Cortex-M55 on an MPS3, as documented in Arm Application Note AN547</p>
</dd>
</dl>
<p>Differences between QEMU and real hardware:</p>
<ul class="simple">
<li><p>AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to
block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
if zbt_boot_ctrl is always zero)</p></li>
<li><p>AN524 remapping of low memory to either BRAM or to QSPI flash is
unimplemented (QEMU always maps this to BRAM, ignoring the
SCC CFG_REG0 memory-remap bit)</p></li>
<li><p>QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest
visible difference is that the LAN9118 doesnt support checksum
offloading</p></li>
<li><p>QEMU does not model the QSPI flash in MPS3 boards as real QSPI
flash, but only as simple ROM, so attempting to rewrite the flash
from the guest will fail</p></li>
<li><p>QEMU does not model the USB controller in MPS3 boards</p></li>
</ul>
<section id="machine-specific-options">
<h2>Machine-specific options<a class="headerlink" href="#machine-specific-options" title="Link to this heading"></a></h2>
<p>The following machine-specific options are supported:</p>
<dl class="simple">
<dt>remap</dt><dd><p>Supported for <code class="docutils literal notranslate"><span class="pre">mps3-an524</span></code> only.
Set <code class="docutils literal notranslate"><span class="pre">BRAM</span></code>/<code class="docutils literal notranslate"><span class="pre">QSPI</span></code> to select the initial memory mapping. The
default is <code class="docutils literal notranslate"><span class="pre">BRAM</span></code>.</p>
</dd>
</dl>
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